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Syllabus

NEC Electronics · Practice

Chapters & sets

1. Basic Electrical and Electronics Engineering

Basic Electrical

Set 1106

Basic Electronics

Set 171 Set 233

2. Digital Logic and Microprocessor

Digital Logic

Set 150 Set 250 Set 350 Set 450 Set 550 Set 650 Set 749 Set 851 Set 950 Set 1050 Set 1150 Set 1232

Microprocessor

Set 150 Set 250 Set 350 Set 445 Set 550 Set 650 Set 720 Set 850 Set 969

3. Programming Language and Its Applications

Mixed chapter MCQs

Set 150 Set 249 Set 349 Set 451 Set 540

4. Computer Organization and Embedded Systems

Mixed chapter MCQs

Set 150 Set 249 Set 350 Set 450 Set 550 Set 650 Set 750 Set 849 Set 950 Set 1050 Set 1150

5. Computer Networks and Network Security

Basic Networking

Set 150 Set 253

Advanced Networking

Set 150 Set 250 Set 350 Set 450 Set 550 Set 655

10. Project Planning, Design and Implementation

Digital Logic Set 3

50 questions

Question 1

What is the 2’s complement of 0011 0101 1001 1100?

A.
$1100 1001 1100 1011$
B.
$1100 1010 0110 0100$
C.

1100 1010 0110 0011

D.

1100 1010 1111 1111

Question 2

A flip-flop is a:

A.
$\text{Chip}$
B.
$\text{I/O element}$
C.
$\text{Memory element}$
D.
$\text{Bus}$

Question 3

With an RS latch, a high S and low R sets the output to:

A.
$\text{No change}$
B.
$\text{High}$
C.
$\text{Race}$
D.
$\text{Set}$

Question 4

With a NAND latch, a low R and a low S produce a:

A.
$\text{Race condition}$
B.
$\text{Reset condition}$
C.
$\text{Set condition}$
D.
$\text{No change condition}$

Question 5

Computers use thousands of flip-flops. To coordinate the overall action, a common signal called the:

A.
$\text{Latch}$
B.
$\text{Master}$
C.
$\text{Clock}$
D.
$\text{Slave}$

Question 6

With positive clocking, the clock signal must be:

A.
$\text{High}$
B.
$\text{Set}$
C.
$\text{Low}$
D.
$\text{Race}$

Question 7

With a JK master-slave flip-flop, the master is clocked when the clock is:

A.
$\text{Set, reset}$
B.
$\text{High, low}$
C.
$\text{Race, no change}$
D.
$\text{Set, race}$

Question 8

When the LOAD input of a buffer register is active, the input word is stored on the next positive:

A.
$\text{Clock edge}$
B.
$\text{Register}$
C.
$\text{Pulse}$
D.
$\text{Transistor}$

Question 9

A shift register moves the bits:

A.
$\text{Left or right}$
B.
$\text{Up or down}$
C.
$\text{Forward or backward}$
D.
$\text{None of the above}$

Question 10

One flip-flop divides the clock frequency by a factor of:

A.
$\text{Two}$
B.
$\text{Four}$
C.
$\text{Eight}$
D.
$\text{Sixteen}$

Question 11

Instead of counting with binary numbers, a ring counter uses words that have a single high:

A.
$\text{Byte}$
B.
$\text{Gate}$
C.
$\text{Bit}$
D.
$\text{Chip}$

Question 12

The memory that is ultraviolet-light erasable and electrically programmable is:

A.
$\text{EPROM}$
B.
$\text{PROM}$
C.
$\text{ROM}$
D.
$\text{RAM}$

Question 13

The memory cell of a dynamic RAM is simpler and smaller than the memory cell of a:

A.
$\text{Volatile RAM}$
B.
$\text{Semiconductor RAM}$
C.
$\text{Static RAM}$
D.
$\text{Bipolar RAM}$

Question 14

How many memory locations can 14 address bits access?

A.
$16,384$
B.
$4,096$
C.
$8,192$
D.
$14$

Question 15

The 2764 is a 65,536-bit EPROM organized as 8,192 words of 8 bits each. How many address lines does it have?

A.
$12$
B.
$13$
C.
$14$
D.
$8$

Question 16

The 2732 is a 4096x8 EPROM. How many address lines does it have?

A.
$12$
B.
$13$
C.
$14$
D.
$8$

Question 17

Address 200H contains the byte 3FH. What is the decimal equivalent of 3FH?

A.
$63$
B.
$16$
C.
$22$
D.
$38$

Question 18

What is the highest address in a 48K memory? Express in hexadecimal and decimal form.

A.
$7FFFH, 64387$
B.
$BFFFH, 49,152$
C.
$BFFFH, 49,151$
D.
$7FFFH, 64,386$

Question 19

Flip-flop outputs are always:

A.
$\text{Complimentary}$
B.
$\text{Independent of each other}$
C.
$\text{The same}$
D.
$\text{Same as inputs}$

Question 20

A combinational logic circuit used to send data from a single source to two or more separate destinations is called:

A.
$\text{Decoder}$
B.
$\text{Multiplexer}$
C.
$\text{Encoder}$
D.
$\text{Demultiplexer}$

Question 21

In which of the following adder circuits is the carry look ripple delay eliminated?

A.
$\text{Half adder}$
B.
$\text{Parallel adder}$
C.
$\text{Full adder}$
D.
$\text{Carry-look-ahead adder}$

Question 22

Consider an RS flip-flop with both inputs set to 0. If a momentary '1' is applied at the input S, then the output:

A.
$Q \text{ will flip from 0 to 1}$
B.
$Q \text{ will flip from 0 to 1 and then back to 0}$
C.
$Q \text{ will remain unchanged}$
D.
$Q \text{ will flip from 1 to 0}$

Question 23

How many full adders are required to construct an m-bit parallel adder?

A.
$m/2$
B.
$m-1$
C.
$m$
D.
$m+1$

Question 24

The dynamic race hazard problem occurs in:

A.
$\text{Combinational circuits only}$
B.
$\text{Sequential circuits only}$
C.
$\text{Both combinational and sequential circuits}$
D.
$\text{None of the above}$

Question 25

A shift register can be used for:

A.
$\text{Parallel to serial conversion}$
B.
$\text{Digital delay line}$
C.
$\text{Serial to parallel conversion}$
D.
$\text{All of the above}$

Question 26

Which of the following flip-flops is free from the race-around problem?

A.
$\text{T flip-flop}$
B.
$\text{Master-slave JK flip-flop}$
C.
$\text{SR flip-flop}$
D.
$\text{All of the above}$

Question 27

For an input pulse train of clock period T, the delay produced by an n-stage shift register is:

A.
$(n+1)T$
B.
$(n-1)T$
C.
$nT$
D.
$2nT$

Question 28

The master-slave JK flip-flop is effectively a combination of:

A.
$\text{An SR flip-flop and a T flip-flop}$
B.
$\text{An SR flip-flop and a D flip-flop}$
C.
$\text{A T flip-flop and a D flip-flop}$
D.
$\text{Two T flip-flops}$

Question 29

The functional difference between SR flip-flop and JK flip-flop is:

A.
$\text{JK flip-flop is faster than SR flip-flop}$
B.
$\text{JK flip-flop has a feedback path}$
C.
$\text{JK flip-flop accepts both input 1}$
D.
$\text{JK flip-flop does not require an external clock}$

Question 30

The term sum-of-products in Boolean algebra means:

A.
$\text{The AND function of several OR functions}$
B.
$\text{The OR function of several AND functions}$
C.
$\text{The OR function of several OR functions}$
D.
$\text{The AND function of several AND functions}$

Question 31

A positive AND gate is also a negative:

A.
$\text{NAND gate}$
B.
$\text{AND gate}$
C.
$\text{NOR gate}$
D.
$\text{OR gate}$

Question 32

What table shows the electrical state of a digital circuit's output for every possible combination of electrical states in the inputs?

A.
$\text{Function table}$
B.
$\text{Routing table}$
C.
$\text{Truth table}$
D.
$\text{ASCII table}$

Question 33

How many bits are required to encode all twenty-six letters, ten symbols, and ten numbers?

A.
$5$
B.
$2$
C.
$6$
D.
$3$

Question 34

The number of two-input NAND gates required to produce the two-input OR function is:

A.
$1$
B.
$3$
C.
$2$
D.
$4$

Question 35

What logic function is obtained by adding an inverter to the inputs of an AND gate?

A.
$\text{OR}$
B.
$\text{XOR}$
C.
$\text{NAND}$
D.
$\text{NOR}$

Question 36

Which of the following Boolean algebra expressions is incorrect?

A.
$AB + A(B + C) + B(B + C) = B + AC$
B.
$[AB(C + BD) + AB]C = BC$
C.
$AB(C + D) = A + B + CD$
D.
$(A + C)(ABC + ACD) = ABC + ACD$

Question 37

Which gate is known as the universal gate?

A.
$\text{NOT gate}$
B.
$\text{NAND gate}$
C.
$\text{AND gate}$
D.
$\text{XOR gate}$

Question 38

What logic function is produced by adding an inverter to the output of an AND gate?

A.
$\text{NAND}$
B.
$\text{XOR}$
C.
$\text{NOR}$
D.
$\text{OR}$

Question 39

An OR gate can be imagined as:

A.
$\text{Switches connected in parallel}$
B.
$\text{MOS transistors connected in series}$
C.
$\text{Switches connected in series}$
D.
$\text{All of the above}$

Question 40

What logic function is produced by adding an inverter to each input and the output of an AND gate?

A.
$\text{NAND}$
B.
$\text{OR}$
C.
$\text{NOR}$
D.
$\text{XOR}$

Question 41

Which of the following algebra statements represents the commutative law?

A.
$(A + B) + C = A + (B + C)$
B.
$A + B = B + A$
C.
$A \cdot (B + C) = (A \cdot B) + (A \cdot C)$
D.
$A + A = A$

Question 42

For what logic gate is the output the complement of the input?

A.
$\text{NOT}$
B.
$\text{OR}$
C.
$\text{AND}$
D.
$\text{XOR}$

Question 43

ASCII and EBCDIC differ in:

A.
$\text{Their efficiency in storing data}$
B.
$\text{The random and sequential access method}$
C.
$\text{The number of bytes used to store characters}$
D.
$\text{Their encoding sequences}$

Question 44

In which code do successive code characters differ in only one bit position?

A.
$\text{Gray code}$
B.
$\text{8421 code}$
C.
$\text{Excess-3 code}$
D.
$\text{Algebraic code}$

Question 45

Cyclic codes are used in:

A.
$\text{Data transfer}$
B.
$\text{Continuously varying signals}$
C.
$\text{Arithmetic and logical computation}$
D.
$\text{All of the above}$

Question 46

The 2's complement of the binary number 010111.1100 is:

A.
$101001.1100$
B.
$010111.0011$
C.
$101000.0100$
D.
$101000.0011$

Question 47

The ASCII code:

A.
$\text{Is a subset of 8-bit EBCDIC}$
B.
$\text{Is used only in Western countries}$
C.
$\text{Is version II of the ASC standard}$
D.
$\text{Has 128 characters, including 32 control characters}$

Question 48

The Gray code for decimal 7 is:

A.
$0111$
B.
$0100$
C.
$1011$
D.
$1010$

Question 49

The octal equivalent of decimal 324.987 is:

A.
$504.771$
B.
$815.234$
C.
$640.781$
D.
$90.987$

Question 50

When an odd number is converted into a binary number, the least significant digit (LSD) is:

A.
$0$
B.
$0 \text{ or } 1$
C.
$1$
D.
$\text{All of the above}$

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