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Syllabus

NEC Computer · Practice

Chapters & sets

1. Basic Electrical and Electronics

Basic Electrical

Set 1106

Basic Electronics

Set 171 Set 233

2. Digital Logic and Microprocessor

Digital Logic

Set 150 Set 250 Set 350 Set 450 Set 550 Set 650 Set 749 Set 851 Set 950 Set 1050 Set 1150 Set 1232

Microprocessor

Set 150 Set 250 Set 350 Set 445 Set 550 Set 650 Set 720 Set 850 Set 969

3. Programming Language and Its Applications

Mixed chapter MCQs

Set 150 Set 249 Set 349 Set 451 Set 540

4. Computer Organization and Embedded System

Mixed chapter MCQs

Set 150 Set 249 Set 350 Set 450 Set 550 Set 650 Set 750 Set 849 Set 950 Set 1050 Set 1150

5. Concept of Computer Network and Network Security System

Basic Networking

Set 150 Set 253

Advanced Networking

Set 150 Set 250 Set 350 Set 450 Set 550 Set 655

6. Theory of Computation and Computer Graphics

Theory of Computation

Set 150 Set 250 Set 360

Computer Graphics

Set 150 Set 251 Set 350 Set 450 Set 550

7. Data Structures and Algorithm, Database System and Operating System

8. Software Engineering and Object-Oriented Analysis & Design

Mixed chapter MCQs

Set 150 Set 250 Set 350 Set 450 Set 550 Set 650 Set 750 Set 926

9. Artificial Intelligence and Neural Networks

Mixed chapter MCQs

Set 150 Set 317 Set 450 Set 550 Set 650 Set 750 Set 850 Set 932

10. Project Planning, Design and Implementation

Engineering Drawing

Set 150 Set 267

Engineering Economics

Set 168

Project Planning & Scheduling

Set 188

Project Mangement

Set 150

Engineering Professional Practice

Set 120

Engineering Regulatory Body

Set 130

Mixed chapter MCQs Set 7

50 questions

Question 1

A certain processor supports only the immediate and the direct addressing modes. Which of the following programming language features cannot be implemented on this pointer?

A.
Pointers
B.
Records
C.
Arrays
D.
All of the above

Question 2

50

The 8085 microprocessor responds to the presence of an interrupt:

A.
As soon as the TRAP pin becomes high
B.
By checking the TRAP pin for high status at the end of each instruction fetch
C.
By checking the TRAP pin for high status at the end of the execution of each instruction
D.
By checking the TRAP pin for high status at regular intervals

Question 3

Which of the following need not necessarily be saved on a context switch between processes?

A.
General purpose registers
B.
Program counter
C.
Translation look aside buffer
D.
All of these

Question 4

If a processor does not have any stack pointer register then:

A.
It cannot have subroutine call instruction
B.
It can have subroutine call instruction, but no nested subroutine calls
C.
Nested subroutine calls are possible, but interrupts are not
D.
All sequence of subroutine calls and also interrupts are possible

Question 5

CPU has two modes-privileged and non-privileged. In order to change the mode from privileged to non-privileged:

A.
A hardware interrupt is needed
B.
A software interrupt is needed
C.
A privileged instruction (which does not generate an interrupt) is needed
D.
A non-privileged instruction (which does not generate an interrupt) is needed

Question 6

In the absolute addressing mode:

A.
An operand is inside the instruction
B.
Address of the operand is inside the instruction
C.
Register containing the address of the operand is specified inside the instruction
D.
Location of the operand is implicit

Question 7

The capacity of program counter (PC) is:

A.
8 bits
B.
16 bits
C.
12 bits
D.
32 bits

Question 8

The function of program counter (PC) holds:

A.
Temporary
B.
Memory operand
C.
Address for memory
D.
Address for instruction

Question 9

The Program Counter (PC):

A.
Is a register
B.
During execution of the current instruction, its content changes
C.
Both (A) and (B)
D.
None of the above

Question 10

The TRAP interrupt mechanism of the 8085 microprocessor executes:

A.
An RST by hardware
B.
The instructions supplied by external device through the INTA signal
C.
An instruction from memory location 20H
D.
None of the above

Question 11

Pseudo-instructions are:

A.
Assembler directives
B.
Instructions in any program that have no corresponding machine code instruction
C.
Instruction in any program whose presence or absence will not change the output for any input
D.
None of the above

Question 12

“The number of instructions needed to add ‘n’ numbers and store the result in memory using only one address instructions is:

A.
n
B.
n-1
C.
n+1
D.
Independent of n

Question 13

The addressing mode used in the instruction PUSH B is:

A.
Direct
B.
Register indirect
C.
Register
D.
Immediate

Question 14

The process of fetching and executing instructions one at a time, in order to increasing an address is called:

A.
Instruction execution
B.
Instruction fetch
C.
Straight line sequencing
D.
Random sequencing

Question 15

The CPU of a computer takes instruction from the memory and executes them. This process is called:

A.
Load cycle
B.
Fetch-execute cycle
C.
Time sequence
D.
Clock cycle

Question 16

In a microprocessor, WAIT states are used to:

A.
Make the processor wait during a DMA operation
B.
Make the processor wait during a power interrupt processing
C.
Make the processor wait during a power shutdown
D.
Interface slow peripheral to the processor

Question 17

When a program is being executed in an 8085 microprocessor, its program counter contains:

A.
Number of instructions in the current program that have already been executed
B.
The total number of instructions in the program being executed
C.
Memory address of the instructions that is being currently executed
D.
Memory address of the instructions that is to be executed next

Question 18

When the HLT instructions of an 8085 microprocessor is executed, the microprocessor:

A.
Is disconnected from the system bus till the reset is pressed
B.
Halts execution of the program and returns to monitor
C.
Enters into a halt-state and the buses are tri-stated
D.
Reloads the program from the location 0024 and 0025

Question 19

Serial input data of 8085 can be loaded into bit 7 of the accumulator by:

A.
Executing a RIM instruction
B.
Using TRAP
C.
Executing RST 1
D.
None of the above

Question 20

Which of the following interrupts are unmaskable interrupts?

A.
RST 5.5
B.
TRAP
C.
RST 7.5
D.
INTR 1

Question 21

The memory address ranges to which RAM will respond:

A.
0000 H to 1 FFF H
B.
4000 H to 5 FFF H
C.
0000 H to 5 FFF H
D.
3000 H to FFFF H

Question 22

The address range to which I/O chip will respond is:

A.
0000 H to FFFF H
B.
4000H to 5FFF H
C.
0000H to 5FFFH
D.
3000 H to FFFF H

Question 23

Both the arithmetic logic unit (ALU) and control section of CPU employ special purpose storage location called:

A.
Decoder
B.
Multiplexer
C.
Buffers
D.
Registers

Question 24

A basic instruction that can be interpreted by a computer generally has:

A.
An operand and an address
B.
Sequence register and decoder
C.
A decoder and an accumulator
D.
An address and decoder

Question 25

The differences between PLA and ROM is:

A.
PLA is combination ROM is sequential
B.
PLA economizes on the number of minterms
C.
PLA has fixed AND array, ROM has fixed OR array
D.
None of these

Question 26

The control unit of computer:

A.
Performs ALU operations on the data
B.
Controls the operation of the output devices
C.
Is a device for manually operating the computer
D.
Directs the other unit of computers

Question 27

The ALU of a computer normally contains a number of high-speed storage elements called:

A.
Semiconductor memory
B.
Hard disk
C.
Registers
D.
Magnetic disks

Question 28

The unit of a computer system which executes program, communication with and often controls the operation of other subsystems of the computer is the:

A.
CPU
B.
I/O unit
C.
Control unit
D.
Peripheral unit

Question 29

The ability of a medium size computer system to increase in data processing capability by addition of such devices as mass storage device, I/O device etc. is called:

A.
Computer expandability
B.
Computer enhancement
C.
Computer mobility
D.
Computer upward capability

Question 30

The technique which repeatedly uses the same block of internal storage during different stage of problem is called:

A.
Overlay
B.
Swapping
C.
Overlapping
D.
Reuse

Question 31

The registers used as a working area in CPU is:

A.
Program counter
B.
Instruction decoder
C.
Instruction register
D.
Accumulator

Question 32

Which of the following information holds the information before going to the decoder?

A.
Control register
B.
Accumulator
C.
Data register
D.
Address register

Question 33

Which of the following unit is used to supervise each instruction in the CPU?

A.
Control logic unit
B.
ALU
C.
Accumulator
D.
Control register

Question 34

The bus which is used to transfer data from main memory to peripheral device is:

A.
Data bus
B.
DMA bus
C.
Input bus
D.
Output bus

Question 35

The device which is used to connect a peripheral to bus is called:

A.
Control register
B.
Communication protocol
C.
Interface
D.
None of these

Question 36

The bus connected between the CPU and main memory that permits transfer of information between main memory and the CPU is called:

A.
DMA bus
B.
Address bus
C.
Memory bus
D.
Control bus

Question 37

What is the storage capacity of a Hollerith card which is organized into nibbles?

A.
32
B.
120
C.
64
D.
240

Question 38

How many addresses are required for 25x40 video RAM?

A.
1020
B.
1000
C.
1920
D.
2000

Question 39

Microprogramming is a technique for:

A.
Writing small program effectively
B.
Programming output/input routines
C.
Programming the microprocessor
D.
Programming the control steps of a computer

Question 40

A device that works in conjunction with a computer but not as part of it is called:

A.
Microprocessor
B.
Hardware
C.
Peripheral device
D.
Memory

Question 41

A system of letters, numbers symbols adopted by computer manufacture as an abbreviation form of instruction sets is called

A.
Mesh
B.
Modern
C.
Monitor
D.
Mnemonic

Question 42

When a subroutine is called, then address of the instruction following the CALL instruction is stored in/on the

A.
Stack pointer
B.
Program counter
C.
Accumulator
D.
Stack

Question 43

In 8085 microprocessors, the value of the most significant bit of the result following the execution of any arithmetic or Boolean instruction is stored in the

A.
Carry status flag
B.
Sign status flag
C.
Auxiliary carry status flag
D.
Zero status flag

Question 44

PLA

A.
Produces sum of products as the outputs
B.
Is dedicated for a particular operation
C.
Is general
D.
Both A and B

Question 45

The sequence of events that happen during a typical fetch operation is

A.
PC-MAR-Memory-MDR-IR
B.
PC-Memory-IR
C.
PC-Memory-MDR-IR
D.
PC-MAR-Memory-IR

Question 46

Which of the following is not a form of memory?

A.
Instruction cache
B.
Instruction opcode
C.
Instruction register
D.
Translation lookaside buffer

Question 47

Which memory is difficult to interface with processor?

A.
Static memory
B.
ROM
C.
Dynamic memory
D.
RAM

Question 48

Desirable characteristic(s) of a memory system is(are)

A.
Speed and reliability
B.
Durability and compactness
C.
Low power consumption
D.
All of these

Question 49

The minimum time delay required between initiation of two successive memory operation is called

A.
Memory cycle time
B.
Transmission time
C.
Memory access time
D.
Skip time

Question 50

Which of the following statement is wrong?

A.
RAM is a type of volatile
B.
Magnetic tape is non-volatile
C.
Magnetic core and semiconductor memories are used as mass memory medium
D.
An EPROM can be programmed, erased and reprogrammed by user with an EPROM programming instruction

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